NSCL DAQ Software Documentation
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CSIS3300

Name

CSIS3300 -- Low Level support for the SIS 3300 Flash ADC module

Synopsis


#include <sis3300.h>
            
 class CSIS3300 {

  CSIS3300(unsigned long nBaseAddress, unsigned int nCrate = 0);

  void Reset();
  void SetClock(CSIS3300::ClockSource eSource);
  void SetStartDelay(bool Enable = false, unsigned int nClocks = 0);
  void SetStopDelay(bool Enable = false, unsigned int nClocks = 0);
  void GateMode(bool Enable = false);
  void RandomClock(bool Enable = false);
  void LemoStartStop(bool Enable = false);
  void P2StartStop(bool Enable = false);
  void HiRA_RCM(bool Enable = false);
  void TriggerOnStop(bool Enable = true);
  void SetSampleSize(SampleSize eSamples);
  void EnableWrap(bool Enable = true);
  unsigned int GetUserInput();
  void SetThresholds(bool* pLessThan, unsigned int* pValues);
  enum CSIS3300::ClockSource getCurrentClockSource();
  bool isStartDelayEnabled();
  unsigned int getStartDelayClocks();
  bool isStopDelayEnabled();
  unsigned int getStopDelayClocks();
  const unsigned int getThresholdValue(unsigned int channel);
  const bool isLtThreshold(unsigned int channel);
  const bool haveHiRAFirmware();
  void LightOn();
  void LightOff();
  void InitDaq();
  void Arm1();
  void Arm2();
  void DisArm1();
  void DisArm2();
  void StartSampling();
  void StopSampling();
  void EnableUserOut();
  void DisableUserOut();
  void StrobeUserOut(int time);
  bool WaitUntilDone(int timeout);
  unsigned long EventNumber(int bank);
  unsigned int ReadGroup1(void* pBuffer);
  unsigned int ReadGroup2(void* pBuffer);
  unsigned int ReadGroup3(void* pBuffer);
  unsigned int ReadGroup4(void* pBuffer);
  unsigned int ReadAllGroups(void * pBuffer);
  unsigned int ReadGroup1(DAQWordBufferPtr& pBuffer);
  unsigned int ReadGroup2(DAQWordBufferPtr& pBuffer);
  unsigned int ReadGroup3(DAQWordBufferPtr& pBuffer);
  unsigned int ReadGroup4(DAQWordBufferPtr& pBuffer);
  unsigned int ReadAllGroups(DAQWordBufferPtr& pBuffer);
  void ClearDaq();
}

Description

The SIS 3300 is an 8 channel flash adc module. Sophisticated clock source specification and trigger selection make this a very flexible module for digitizing wave forms. Modifications to the base firmware also make this a useful module for reading out multiplexed signals into a single high density module.

Public member functions

CSIS3300(unsigned long nBaseAddress, unsigned int nCrate = 0);

Constructs an object that can be used to control and read an SIS 3300 flash ADC module. nBaseAddress is the module base address set in the module rotary switches while nCrate is the VME crate number the module has been installed in. If omitted, nCrate is zero which is suitable for use in single crate systems.

void Reset();

Does a software reset of the module.

void SetClock(CSIS3300::ClockSource eSource);

Selects the clock source for the flash ADC. See "Types and Public data" below for information about the possible values of the CSIS3300::ClockSource data type.

void SetStartDelay(bool Enable = false, unsigned int nClocks = 0);

Enables or disables the start delay according to the value of Enable if Enable is true nClocks sets the value of that delay in clock ticks. The start delay is the time between the start command or pulse and when the digitizer accepts its first sample.

void SetStopDelay(bool Enable = false, unsigned int nClocks = 0);

Enables or disables the stop delay in a manner similar to SetStartDelay. If Enable is true then nClocks is the delay in clock ticks between the stop signal or command and when the last digitizer sample is accepted.

void GateMode(bool Enable = false);

Enables or disables the module to operate in Gate mode. In gate mode the digitization interval is determined by the width of the start input.

void RandomClock(bool Enable = false);

Selects random clock mode if Enable is true.

void LemoStartStop(bool Enable = false);

Enables the front panel start and stop inputs.

void P2StartStop(bool Enable = false);

Enable digitization start and stop to come from uncommitted backplane pins on the P2 connector. See the module's hardware manual for information about which pin is which.

void HiRA_RCM(bool Enable = false);

Enables HiRA Random Clock Mode. HiRA random clock mode is part of the normal firmware now. In random clock mode, the clock is a front panel input. It can come at any frequency as long as it meets specific duty factor requirements. In HiRA Random Clock mode, the duty factory is unconstrained. as well.

void TriggerOnStop(bool Enable = true);

Sets the module to emit a trigger pulse when digitization is stopped if Enable is true.

void SetSampleSize(SampleSize eSamples);

Sets the number of samples in an event. The possible values of eSamples are described in "Types and public data" below.

void EnableWrap(bool Enable = true);

If Enable is true the samples are allowed to wrap in the internal buffer during sampling. Otherwise sampling ends when the end of the internal event buffer is reached.

unsigned int GetUserInput();

Returns the value of the user NIM input.

void SetThresholds(bool* pLessThan, unsigned int* pValues);

Sets the channel thresholds for the internal trigger. It is possible for a trigger to be fired whenever the voltage input to a channel goes above or below a threshold. The trigger is a NIM out which can, in turn, be used as e.g. a start or stop input. pLessThan points to an array of 8 bools. For each bool that is true, that channel's threshold means trigger when less than. pValues points to an array of 8 integer values that are the thresholds for the individual channels.

enum CSIS3300::ClockSource getCurrentClockSource();

Returns the current clock source. See "Types and public data" below for legal values of the CSIS3300::ClockSource enumerated data type.

bool isStartDelayEnabled();

Returns true if the start delay is enabled.

unsigned int getStartDelayClocks();

Returns the current value of the start delay in clock ticks. This has no meaning if the start delay is disabled.

bool isStopDelayEnabled();

Returns true if the stop delay is disabled.

unsigned int getStopDelayClocks();

Returns the current value of the stop delay in clock ticks. This has no meaning if the stop delay is disabled.

const unsigned int getThresholdValue(unsigned int channel);

Returns the threshold value for a specified channel.

const bool isLtThreshold(unsigned int channel);

Returns true if the trigger threshold for channel channel is a "less than" trigger.

const bool haveHiRAFirmware();

Returns true if the module has firmware that supports HiRA Random clock mode.

void LightOn();

Turns the user led on.

void LightOff();

Turns the user led off.

void InitDaq();

Sets up the module as it was configured by calls to the preceding set of members.

void Arm1();

Arms the module to digitize into the bank 1 memory. Note that at present, we only support bank 1 memory for readout.

void Arm2();

Arms the module to digitize into the bank 2 memory. Note that at present, we only support bank 2 memory for the readout. It is possible, however, if you know enough about the module internals to either derive a class from this that supports both banks or build code around this class than supports both banks.

void DisArm1();

Disarms sampling into bank 1.

void DisArm2();

Disarms sampling into bank 2.

void StartSampling();

Starts the module sampling. If there is a start delay programmed, this will delay the actual time of the first sample.

void StopSampling();

Stops sampling. If a stop delay has been programmed, this will delay the actual time of the last sample.

void EnableUserOut();

Enables the user NIM output.

void DisableUserOut();

Disable the user NIM output.

void StrobeUserOut(int time);

Pulses the user NIM output

bool WaitUntilDone(int timeout);

Pauses until digitization stops. The timeout parameter is the number of loop passes for which the system will wait. true is returned if the timeout is exceeded without sampling stopping. The assumption in this function is that at least one sample will occur for each loop pass. If sampling is halted the module will also have both banks disarmed.

unsigned long EventNumber(int bank);

Returns the last event number acquired by the specified bank.

unsigned int ReadGroup1(void* pBuffer);

Reads data from the most recent event in the first group of adcs (channel 0/1). The group data are read into the buffer pointed to by pBuffer. The buffer must be large enough to accept the full sample count programmed into the ADC. See SetSampleSize for more information.

unsigned int ReadGroup2(void* pBuffer);

Same as ReadGroup1 however the data from the second group of channels (channels 2/3) are read.

unsigned int ReadGroup3(void* pBuffer);

Same as ReadGroup1 however the data from the third group of channels (channels 4 and 5) are read.

unsigned int ReadGroup4(void* pBuffer);

Same as ReadGroup1 however the data from the fourth group of channels (channels 6/7) are read.

unsigned int ReadAllGroups(void * pBuffer);

This is equivalent to doing reads on all groups .

unsigned int ReadGroup1(DAQWordBufferPtr& pBuffer);

Reads the most recent event from the first pair of adcs directly into a spectrodaq buffer.

unsigned int ReadGroup2(DAQWordBufferPtr& pBuffer); unsigned int ReadGroup3(DAQWordBufferPtr& pBuffer); unsigned int ReadGroup4(DAQWordBufferPtr& pBuffer); unsigned int ReadAllGroups(DAQWordBufferPtr& pBuffer); void ClearDaq();

Types and public data

The CSIS3300::ClockSource data type is an enumerated data type that specifies the source of the ADC sampling clock. Legal values of this type are:

CSIS3300::Internal100Mhz

Selects the internal 100Mhz clock. Note that since the original module was released, modules with different clock options have been released. It's not possible to deterimine programmatically which modules are which. This option sets the value 0 in the clock selection field.

CSIS3300::Internal50Mhz

Selects the internal 50Mhz clock. Note that since the original module was released, modules with different clock options have been released. It's not possible to deterimine programmatically which modules are which. This option sets the value 1 in the clock selection field.

CSIS3300::Internal25Mhz

Selects the internal 25Mhz clock. Note that since the original module was released, modules with different clock options have been released. It's not possible to deterimine programmatically which modules are which. This option sets the value 2 in the clock selection field.

CSIS3300::Internal12_5Mhz

Selects the internal 12.5Mhz clock. Note that since the original module was released, modules with different clock options have been released. It's not possible to deterimine programmatically which modules are which. This option sets the value 3 in the clock selection field.

CSIS3300::Internal6_25Mhz

Selects the internal 6.25Mhz clock. Note that since the original module was released, modules with different clock options have been released. It's not possible to deterimine programmatically which modules are which. This option sets the value 4 in the clock selection field.

CSIS3300::Internal3_125Mhz

Selects the internal 3.125Mhz clock. Note that since the original module was released, modules with different clock options have been released. It's not possible to deterimine programmatically which modules are which. This option sets the value 5 in the clock selection field.

ExternalFp

Selects the clock from the externa front panel clock input. This must be selected for random clock modes.

ExternalP2

Selects the clock from the P2 connector.

The CSIS3300::SampleSize data type is an enumerated type that is used to set or read the number of samples in an event buffer. It can take the following values:

Sample128K

Sets the sample size to 128K samples. Note that a K is 1024.

Sample16K

Sets the sample size to 16K samples.

Sample4K

Sets the sample size to 4K samples.

Sample2K

Sets the sample size to 2K samples.

Sample1K

Sets the sample size to 1K samples.

Sample512

Sets the sample size to 512 samples.

Sample256

Sets the sample size to 256 samples.

Sample128

Sets the sample size to 128 samples.

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