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pixie16sys_defs.h
1 #ifndef PIXIE16SYS_DEFS_H
2 #define PIXIE16SYS_DEFS_H
3 
4 /*----------------------------------------------------------------------
5 * Copyright (c) 2005 - 2009, XIA LLC
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms,
9 * with or without modification, are permitted provided
10 * that the following conditions are met:
11 *
12 * * Redistributions of source code must retain the above
13 * copyright notice, this list of conditions and the
14 * following disclaimer.
15 * * Redistributions in binary form must reproduce the
16 * above copyright notice, this list of conditions and the
17 * following disclaimer in the documentation and/or other
18 * materials provided with the distribution.
19 * * Neither the name of XIA LLC nor the names of its
20 * contributors may be used to endorse or promote
21 * products derived from this software without
22 * specific prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
25 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
26 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
27 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
28 * IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
29 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
31 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
32 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
33 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
35 * THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
36 * SUCH DAMAGE.
37 *----------------------------------------------------------------------*/
38 
39 /******************************************************************************
40 *
41 * File Name:
42 *
43 * pixie16sys_defs.h
44 *
45 * Description:
46 *
47 * Declaration of pixie16 library constants.
48 *
49 * $Rev: 28166 $
50 * $Id: pixie16sys_defs.h 28166 2013-10-07 18:33:28Z htan $
51 ******************************************************************************/
52 
53 // If this is compiled by a C++ compiler, make it
54 // clear that these are C routines.
55 #ifdef __cplusplus
56 extern "C" {
57 #endif
58 
59 /*-------------------------------------
60  At which platform to compile this code -
61  Windows or Linux?
62  -------------------------------------*/
63 #define PIXIE16_WINDOWS_SYSAPI 0
64 #define PIXIE16_LINUX_SYSAPI 1
65  // Changing PIXIE16_SYSAPI_VER here affects the code globally
66 #define PIXIE16_SYSAPI_VER PIXIE16_LINUX_SYSAPI
67 
68 
69 /*-------------------------------------
70  Define EXPORT macro
71  -------------------------------------*/
72 
73 #if PIXIE16_SYSAPI_VER == PIXIE16_WINDOWS_SYSAPI
74 #define PIXIE16SYS_EXPORT __declspec(dllexport)
75 #elif PIXIE16_SYSAPI_VER == PIXIE16_LINUX_SYSAPI
76 #define PIXIE16SYS_EXPORT
77 #endif
78 
79 
80 #ifndef PCI_CODE
81 #define PCI_CODE
82 #endif
83 
84 #ifndef LITTLE_ENDIAN // LITTLE_ENDIAN: least significant byte stored first
85 #define LITTLE_ENDIAN // BIG_ENDIAN: most significant byte stored first
86 #endif
87 
88 
89 #define SYS_MAX_NUM_MODULES 32 // Preset maximum number of modules for defining data structures
90 #define SYS_MAX_PXI_SLOTS 14 // Maximum number of PXI slots for one PXI chassis (currently 14-slot is the biggest chassis)
91 
92 
93 /*-------------------------------------
94  Multiplication factor for the ns_per_cycle
95  -------------------------------------*/
96 #define NSMULTIPLIER 1.0
97 
98 
99 /*-------------------------------------
100  Option for printing out debugging messages
101  -------------------------------------*/
102 #define PRINT_DEBUG_MSG 1
103 
104 
105 /*-------------------------------------
106  DSP code tag types
107  -------------------------------------*/
108 
109 #define FINAL_INIT 0X0000
110 #define ZERO_DM16 0X0001
111 #define ZERO_DM32 0X0002
112 #define ZERO_DM40 0X0003
113 #define INIT_DM16 0X0004
114 #define INIT_DM32 0X0005
115 #define INIT_DM40 0X0006
116 #define ZERO_PM16 0X0007
117 #define ZERO_PM32 0X0008
118 #define ZERO_PM40 0X0009
119 #define ZERO_PM48 0X000A
120 #define INIT_PM16 0X000B
121 #define INIT_PM32 0X000C
122 #define INIT_PM40 0X000D
123 #define INIT_PM48 0X000E
124 #define ZERO_DM64 0X000F
125 #define INIT_DM64 0X0010
126 #define ZERO_PM64 0X0011
127 #define INIT_PM64 0X0012
128 
129 
130 /*-------------------------------------
131  I/O Mode
132  -------------------------------------*/
133 
134 #define SYS_MOD_READ 1 // Host read from modules
135 #define SYS_MOD_WRITE 0 // Host write to modules
136 
137 #define MAX_ERRMSG_LENGTH 2048 // Maximum length of error message
138 
139 
140  /*-------------------------------------
141  Host PCI CSR bits definitions
142  --------------------------------------*/
143 #define RUNENA 0 // Enable run
144 #define DSPDOWNLOAD 1 // Enable DSP code download
145 #define PCIACTIVE 2 // Indicate PCI I/O is active
146 #define PULLUP_CTRL 3 // Control pull-up for the SYNC lines
147 #define DSPRESET 4 // Reset DSP
148 #define EXTFIFO_WML 6 // External FIFO watermark level indicator
149 #define RUNACTIVE 13 // Run active indicator
150 #define CLREXTMEM_ACTIVE 15 // Clearing external memory active indicator
151 
152 
153 
154 
155 /*-------------------------------------
156  PCI address decoding and control registers
157 -------------------------------------*/
158 
159 #define CFG_DATACS 0x00
160 #define CFG_CTRLCS 0x04
161 #define CFG_RDCS 0x08
162 #define I2CM24C64_ADDR 0x10
163 #define CFG_DCMRST 0x14
164 #define CSR_ADDR 0x48
165 
166 #define REQUEST_HBR 0x80
167 #define HBR_DONE 0x84
168 #define WRT_EXT_MEM 0xC0
169 #define EXT_MEM_TEST 0xC4
170 #define WRT_DSP_MMA 0xC8
171 #define SET_EXT_FIFO 0xCC
172 
173 #define WRT_DSP_DMAC11 0xD0
174 #define WRT_DSP_II11 0xD4
175 #define WRT_CLR_EXTMEM 0xD8
176 #define WRT_DSP_C11 0xDC
177 #define WRT_DSP_IM11 0xE0
178 #define WRT_DSP_EC11 0xE4
179 #define RD_WRT_FIFO_WML 0xE8
180 #define SET_EXMEM_FIFO 0xEC
181 #define SET_INT_FIFO 0xF0
182 #define WRT_RESET_RFCNT 0xF4
183 
184 /*-------------------------------------
185  Special DSP varaible address
186 -------------------------------------*/
187 #define POWERUPINITDONE_ADDRESS 0x4A03F // Address for DSP variable PowerUpInitDone
188 
189 /*-------------------------------------
190  PLX DMA transfer timeout setting
191 -------------------------------------*/
192 #define DMATRANSFER_TIMEOUT 5*1000 // PLX DMA transfer timeout limit, in ms
193 
194 
195 #ifdef __cplusplus
196 }
197 #endif // End of notice for C++ compilers
198 
199 #endif // End of pixie16sys_defs.h
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